Conventional flash A/D converters employ a number of resistors, comparators equal to the desired resolution: an 8 bit A/D flash converter requires 256 resistors, and 255 comparators. This makes for a large and expensive component. To avoid this a two-stage or multi-stage converter system is used in which a first flash A/D converter digitizes the analog input signal, A.sub.in, to a four-bit level, for example. This four-bit digitization is then processed through a D/A converter to obtain the analog value of the digitized signal and this analog signal is subtracted from the original analog input signal A.sub.in. The result of this subtraction, known as the quantization error or residue, represents the error due to the coarseness of the first digitization step. This residue is then submitted to a second (four-bit for example) A/D flash converter where it is digitized to obtain the higher resolution. Typically an amplifier is used to provide the necessary gain to insure that the four bit output from the second flash converter is equal to one bit of the first flash converter. Finally, the four bits from the first converter and the four bits from the second converter provide the four MSBs and four LSBs, respectively, of the eight-bit output code.
One problem in such systems is that the residue range values vary with comparator offset errors in the first flash converter. Sometimes the residue signal will be less, and sometimes more, than the full range of the second A/D flash converter. It is standard procedure to include additional over- and under-range capacity in the second A/D flash converter to accommodate these excursions. In that case the four-bit outputs from each flash converter cannot be combined directly but must be processed by a logic circuit to obtain the final output code. This compensation for the first flash converter is known as digital error correction.
Even in systems having such digital error corrections an additional problem occurs. When the system is being tested it is not apparent just where in the range of the second flash converter the system is operating. If it is operating in the normal range or just barely in the over- or under-correction range the system can be relied on for satisfactory performance. But if the system is operating at the extreme end of either the over- or under-correction range, then a failure may well occur as soon as the system is installed by a customer in an environment where the voltage, temperature, or some other condition causes the system to go beyond even its over- or under-range correction capacity. Further, often it is desired for purposes of economics and complexity to eliminate the sample and hold circuit which typically precedes the first flash converter. When this is so, the analog input can change during the conversion, adding to offset errors introduced by the first converter and increase the chances that the system may exceed even its over- and under-correction range in its final installation.